• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    Method and apparatus in a telecommunication system for activation of means from idling state to active state. The system includes a digital subscriber connection in which there is included a line terminal (LT) assigned to the station side of the system, a network terminal (NT) assigned to the subscriber installation and one or more subscriber terminal (ST). The line terminal is connected to a central clock pulse oscillator (master oscillator) (MCL) on the station side, the network terminal and subscriber terminals containing local clock pulse oscillators (slave oscillators) (CL). In activation from the subscriber side, a subscriber terminal (ST) sends an activation request (AR) in the form of a bit pattern sent in bursts to the network terminal (NT) via a TDM bus line ((BL). The network terminal sends the activation request (AR) to the line terminal (LT), in the form of a continuously sent, cyclic bit pattern. The line terminal sends an activation request to a station (EX), which then sends an activation order (AO) back to the line terminal, which sends an activation order (AO) in the form of a continuous bit pattern back again to the network terminal (NT). The network terminal then sends an activation order in the form of bit bursts to the subscriber terminal (ST). The subscriber terminal sends the activation order signal to the subscriber. In activation from the station side the activation order goes directly from the station without a preceding activation request from the subscriber.
    公开号:SU1582995A3
    申请号:SU843786903
    申请日:1984-08-29
    公开日:1990-07-30
    发明作者:Йерг Фризлен Ханс
    申请人:Телефонактиеболагет Л.М.Эрикссон (Фирма)；
    IPC主号:
    专利说明:

    one
    (21) 3786903 / 24-09
    (86) PCT / SE 83/00449 (12/14/83)
    (22) 08/29/84
    (31) 8207518-5
    (32) 12/30/82
    (33) SE
    (46) 07/30/90. Bup. K 28
    (71) Telephony has LM Erikson (SE)
    (72) Hans Jörg Frizlen (DE)
    (53) 621.394662 (088.8)
    (56) U.S. Patent No. 4,314,109, Cl, H 04 J 3/06, 1984.
    (54) SYNCHRONIZATION SYSTEM OF DIGITAL COMMUNICATION NETWORK
    (57) The invention relates to communication technology. The purpose of the invention is to reduce the time to establish synchronization with a digital connection of subscribers. The synchronization system includes a subscriber terminal 1 consisting of transmitter 2 and receiver 3, a network terminal 4 consisting of receiver 5 and transmitter 6, forming a subscriber network terminal, and transmitter 7 and receiver 8 forming a fixed network terminal, as well as a line terminal 9, consisting of receiver 10 and transmitter 11. The synchronization system operates in two synchronization modes, one of which starts from the subscriber side and the other from the station. In the first case, the subscriber receives a request for synchronization signal, and in the second, a command for synchronization is received from the station. After processing the signals and generating the synchronization signal, a synchronous connection is established for the bits and frames. Given il. performance terminals 1. 4 and 9. 3 Il.
    with s
    M
    WITH
    zn
    eo
    HS

    x
    | CD
    FIG. one

    cm
    The invention relates to communication technology and is used in digital network telecommunications synchronization systems for digital connection of subscribers.
    The aim of the invention is to reduce the time to establish synchronization when a digital connection of subscribers
    FIG. 1 is a block diagram of the digital communication network synchronization system of FIG. 2 is a specific implementation of a subscriber terminal with a subscriber terminal of the network; in fig. 3 shows a specific implementation of a fixed network terminal and a line station terminal,
    The synchronization system (FIG. 1) contains a subscriber terminal 1, which includes a transmitter 2 and a receiver 3, a network terminal 4, the subscriber terminal of which includes. the receiver 5 and the transmitter 6, and the stationary terminal of the network includes the transmitter 7 and the receiver 8, and the line terminal 9 of the station, which includes the receiver 10 and the transmitter 11, and the transmitter 2 and receiver 3 of the subscriber terminal adapter 12, generator 13 clock pulses, generator 14 codes, triggers 15-17, threshold detector 18, synchronization control unit 19, counter 20, elements OR 21-23, valve 24, and counter 25 in the generator 14 of code addresses and a permanent storage unit (PSB) 26, in the receiver 5 and transmitter 6 a Onent network terminal includes adapter 27, 28 clock pulses and code generator 29, threshold detector 30, first and second triggers 31 and 32, synchronization control unit 33, additional generator code 34, elements AND 35, 36, elements OR 37 - 39, and the code generator 29 includes the 4D address counter and the FBT 41, and the additional code generator 34 includes the address counter 42 and the FFB 43, the transmitter 7 and the receiver 8 of the network station terminal include the code transmitter 44, adaptive echo suppressor 45, code receiver 46, control unit 47 Eni, data switch 48, frame code generator 49, trigger 50, frame detector 51 and clock generator 52, and code transmitter 53, adaptive echo suppressor 54, code receiver 55, central clock generator 56, laziness unit 57 ynpavs, data switch 58, frame code generator 59, frame detector 60, trigger 61, And element 62 and inverter 63.
    The synchronization system of a digital communication network operates as follows.
    Consider the operation of the system when the synchronization mode starts from the subscriber side.
    At the clock input of the first trigger 15 in the subscriber terminal 1, a signal is received. A synchronization request, for example in the form of 1. This signal can be sent from the subscriber lifting the handset if the terminal is a telephone device. From the output of the trigger 15, the signal 1 is fed to the installation input of the second trigger 16, the output of which is fed to the installation input of the third trigger 17. The output signal of the third trigger 17 is fed to the inputs Resolution of the generator 13 clock pulses (TI) and the generator 14 code, clock pulses from the output the generator 13 is fed to the input of the generator 14 of the code, which forms at the output a code word, so-called sending windows, various types of which are stored in the TZB 26.
    The clock signals from the generator 13 are fed to the input of the code generator 14 and control the issuance of packets of binary code words from the PZB 26, In this case, the code words are 19 bits long.
    Code words, i.e. the sending windows are fed to the input of the valve 24, to the other input of which a signal is output from the trigger 15 through the OR element 21 upon receipt of the synchronization request signal. From the output of the valve, 24 bundles of code words are transmitted via adapter 12 through a time division multiplexing line to the adapter 27 of the subscriber terminal of the network. I,
    In addition, the code words from code generator 14 are fed to the input of counter 20, which, after receiving three frames, sends a Reset signal to the first trigger 15 via the OR element 22, and the synchronization mode process in the subscriber terminal 1 ends.
    5158
    In the subscriber terminal of the network, the threshold detector 30 detects the reception of code words sent from the subscriber terminal 1 relative to a fixed threshold level. The output signal of the threshold detector 30 through the trigger 31 is fed to the input of the installation of the trigger 32, the output signal of which is fed to the inputs of the resolution of the TU 28 and the code generator 29.
    Time synchronization of the clock signal in the subscriber terminal A of the network with the clock signal from the subscriber terminal 1 is carried out from the generator 28 of clock pulses controlled in phase by the output signal of the trigger 31. The signal from the generator 28 TI is fed to the input of the generator 29 of the code, in which new code words are generated, consisting of 19 bits that are read from the FFR 41, the codeword length control is performed in the synchronization control unit 33. The first inputs of the synchronization control unit 33 receive code words from the code generator 29, and the second inputs receive code words from the output of the threshold detector 30, and the monitoring is carried out so that the code words at the inputs of the synchronization control unit 33 are equal to The control is carried out under the control of the clock signals from the generator 28. If the control is confirmed, then the signal 1 as a signal. This signal from the output of the element 35 is applied to the element OR 37, the receiver 5 of the subscriber terminal 4 of the network assumes the initial state as a result of a reset signal received on the trigger 32 from the output of the element OR 37 and the reset signal on trigger 31 from the output of the element OR 37 through the element OR 38. Loss of synchronization also returns to the initial state through the element OR 37, the following code word from the generator 29 of the code sets the trigger 31 to O through the element OR 38, the trigger 31 is now released to detect the new code words constituents from the user terminal 1. The synchronization request signal via the AND gate 35 is input to the control unit 47 of the terminal station network (Figure 3) which supplies
    five
    control signals to data switch 48, which in its first position switches binary sigpaps from code transmitter 44; In the second position, the signals in frame format are switched from frame code generator 49. When a signal arrives, the synchronization request from the subscriber is set to the data switch 48 so that the serial continuous cyclic bit data stream is transmitted from the code transmitter 44 through the trigger 50, through the adaptive echo suppressor 45 and through the communication line to the line terminal 9 of the station, where code receiver 55 detects a data stream, and if a sync request signal is detected, then signal 1 is sent to the station via AND 62,
    The station in this case generates a command signal for synchronization and provides the input to the control unit 57 of the line terminal station 9. The inverter 63 interrupts the sync request signal to the station when a sync command signal is sent. The output of control block 57 controls trigger 61 and data switch 58 so that data in frame format in sequential form, including synchronization information, is sent, under control of the central oscillator, 56 clock pulses from frame code generator 59 back to the network station terminal via trigger 61. In its second position, the data switch 58 commutes binary information from the code transmitter 53,
    The clock generator 52 is synchronized in the usual manner with the frequency of the signal of the central generator 56 transmitted in the data stream. Upon detecting frame synchronization information, frame detector 51 sends control signals to control unit 47 to enable transmission of information corresponding to a given moment in a frame format to a line terminal 9 of the station, in which detection of synchronization information is performed in frame detector 60 and interpreted as a successful synchronization and a synchronization signal is sent to the station.
    Signal The command for synchronization from the output of the frame detector 51 is fed to the input of the element 36, the clock signal from the generator 52 controls an additional code generator 34, the PDB 43 of which is provided by the transmission window and the receive window,
    The transmission window is fed to the element AND 36, through which the bit combinations arrive in the form of packets through the adapters 27 and 12 through the communication line to the subscriber terminal 1,
    The receive window from ELV 43 is fed through the OR element 39 to the input of the trigger 315 which is blocked as a result and prevents the synchronization fronts occurring at its output when the subscriber terminal of the network itself sends waddles. Such fronts should occur only when the subscriber terminal networks receive packets of bits from user terminal 1. The second input element
    thirty
    40
    OR 39 is inverting, and the Comm-25 signal starts code transmitter 44. The code for synchronization is supplied to set the trigger 31 in cases when this signal is absent n, the receiver 5 is ready to receive bursts of bits from the subscriber terminal 1,
    In the subscriber terminal 1, the bursts of bits from the subscriber terminal of the network through adapter 12 are fed to a threshold detector 18 of receiver 3.
    The output signal from the threshold detector 18 triggers triggers 16 and 17, while the output signal of the trigger 17 synchronizes the clock from the clock generator to the frequency of the central oscillator 56. The generator 13 starts the code generator 14, the transmission windows are read from the LZB 26 and fed to the first input synchronization control unit 19, to the second input of which bit combinations from subscriber terminal 4 of the network are received.
    Comparison of word lengths is performed, as described, when they are equal. The command to synchronize from Spock's control panel 19 to the subscriber installation, which is so synchronized.
    The reset signal is applied through the OR element 23 to the triggers 16 and 17 from the code generator 14 and from the synchronization control unit 19, respectively.
    to return to the outgoing state and
    Transmitter 44 sends cyclic bit patterns to the station where the code is detected in code receiver 55. After detection, the frame code generator 59 sends the data in frame format and synchronization information to the network station terminal under control of the central generator 56. The frame synchronization format is detected in 35, frame detector 51, which sends a command to synchronize to the subscriber and, through control unit 47, controls the transmission of data in the frame format from frame code generator 49 back to thoron station. In the line terminal 9 of the station, the frame detector 60 detects the frame format-frame synchronization and generates a synchronization signal confirmed, t, it is set up synchronous connection in bits and frames. In other respects, the synchronization establishment procedure is fully consistent with the establishment of the synchronization mode from the subscriber.
    45
    50
    55
    权利要求:
    Claims (1)
    [1]
    Invention Formula
    A synchronization system of a digital communications network containing a series-connected subscriber terminal, which includes an adapter and a clock generator, the output of which is connected to the generator input
    0
    to receive the next bit packet from the subscriber terminal of the network 4.
    If three consecutive frames were transmitted to the subscriber terminal 4 of the network, or when the synchronization command signal is sent to the subscriber, the OR 22 element is turned on, the output of which blocks the trigger 15 and stops further transmission of the bursts of bits to the subscriber terminal 4 of the network.
    In the case of synchronization, started from the station, the command is sent to the control unit 57, which flips the trigger 61, thereby allowing the transmission of a code combination from the code transmitter 53 to the subscriber's side. In the network station 4 terminal, the generator 52 is synchronized from the master frequency from the received bit stream, the code is detected in the code receiver 46, which is then
    code transmitter 44 is enabled.
    Transmitter 44 sends cyclic bit patterns to the station where the code is detected in code receiver 55. After detection, the frame code generator 59 sends the data in frame format and synchronization information to the network station terminal under control of the central generator 56. The frame synchronization format is detected in frame detector 51, which sends a command to synchronize to the subscriber and, through control block 47, controls the transmission of data in frame format from frame code generator 49 back to st Vorona Station. In the line terminal 9 of the station, the frame detector 60 detects the frame format-frame synchronization and generates a synchronization signal confirmed, t, it is set up synchronous connection in bits and frames. In other respects, the synchronization establishment procedure is fully consistent with the establishment of the synchronization mode from the subscriber.
    Invention Formula
    A synchronization system of a digital communications network containing a series-connected subscriber terminal, which includes an adapter and a clock generator, the output of which is connected to the generator input
    code, a network terminal consisting of a network user terminal, which includes an adapter and a clock generator, the output of which is connected to the code generator input and a network station terminal, which includes a code transmitter, an adaptive echo suppressor, the output of which connected to the input of the code receiver, a generator of clock pulses, s, the line terminal of the station, which includes a code transmitter, an adaptive echo suppressor, the output of which is connected to the input of the code receiver, and a central generator clock pulses, characterized in that, in order to reduce the synchronization establishment time during digital subscriber connection, the first, second and third triggers connected in series, the threshold detector, the synchronization control unit, the counter, the OR elements and the gate, and the generator are introduced into the subscriber terminal The code is made up of a serially connected address counter and a persistent storage unit (PZB), the control inputs of which are interconnected and are the input of the Code Generator Resolution, clock the input of which is the address counter input, the first output of the code generator's PZB is connected to the adapter's input via a valve, to another input of which the output of the synchronization control unit is connected via the first OR element, to the other input of which the output of the first trigger is connected, the first output of the code generator's FBB is connected to the counter input of the counter, to the Reset input of which the second output of the first trigger is connected, and the counter output and the output of the synchronization control unit are connected to the Reset input of the first trigger through the second element OR, output The control signal signals of the generator code and the synchronization control unit are connected via the third element OR to the Reset input of the second trigger, to the counting input of which the output of the threshold detector is connected, and to the Reset input of the third trigger, to the clock input of which the output is connected clock generator, to the signal inputs of the synchronization control unit pod0
    five
    0
    five
    0
    five
    0
    five
    0
    five
    The second output of the code generator's FBB and the output of the threshold detector, the input of which is connected to the adapter output, and the third flip-flop output are connected to the input, enable the clock generator and the code generator, respectively, and the first trigger input is the input of the sync control signal - the output of the command to synchronize the subscriber terminal in the network terminal to the subscriber terminal - the serially connected threshold detector is entered into the network terminal, the first and The triggers, as well as the synchronization control unit, an additional code generator, AND elements and OR elements, and the code generator and additional code generator are identical in the form of a serially connected address counter and a PZB, and the control inputs of the address counter and the PZB code generator are interconnected and are the input of the resolution of the code generator, the clock input of which is the input of the address counter, while the first adapter vi is connected to the input of the threshold detector, the output of the first trigger is connected to the control the clock input pulse generator, the output of which is connected to the clock input of the synchronization control unit, to the signal inputs of which the corresponding t are connected
    but the output of the code generator's PZB and the output of the threshold detector, the output of the second trigger is connected to the input. Resolution of the clock generator and the code generator, signal output. Synchronization confirmation of the synchronization control unit is connected to the first input of the first And element, whose output and output. the first OR element to the Reset input of the second trigger, and the output of the first OR element and the output of the control signal of the generator code of the code generator through the second element OR are connected to the input Reset the first trigger, to the installation input of which the output of the control signal of the PZB of the additional code generator is connected via the third OR element, the second input of which is connected to the second input of the first AND element and to the first input of the second AND element, to the second input
    F (/ g 2
    51
    CL
    CL
    fx
    Fig.z
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    同族专利:
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    SE8207518L|1984-07-01|
    FI843026A0|1984-07-31|
    IT8324419D0|1983-12-28|
    EP0131591B1|1986-12-03|
    AU2417084A|1984-08-02|
    US4592051A|1986-05-27|
    KR840007339A|1984-12-06|
    IE833015L|1984-06-30|
    IT1170067B|1987-06-03|
    GR78757B|1984-10-02|
    WO1984002815A1|1984-07-19|
    SE435011B|1984-08-27|
    PT77874B|1986-04-09|
    KR870000071B1|1987-02-09|
    MX154832A|1987-12-15|
    DK413584D0|1984-08-29|
    IN160186B|1987-06-27|
    IE55370B1|1990-08-29|
    YU253783A|1986-04-30|
    FI81707B|1990-07-31|
    ES8602326A1|1985-11-01|
    EP0131591A1|1985-01-23|
    FI843026A|1984-07-31|
    SE8207518D0|1982-12-30|
    DE3368162D1|1987-01-15|
    ES528510A0|1985-11-01|
    DK413584A|1984-08-29|
    CA1200332A|1986-02-04|
    PT77874A|1984-01-01|
    FI81707C|1990-11-12|
    JPS60500118A|1985-01-24|
    DK162676B|1991-11-25|
    HU202020B|1991-01-28|
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    引用文献:
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    DE2737713C2|1977-08-22|1983-09-29|Siemens AG, 1000 Berlin und 8000 München|Time division multiplex digital switching system, in particular PCM telephone switching system, with double switching network devices|
    US4143246A|1977-09-06|1979-03-06|Bell Telephone Laboratories, Incorporated|Time division line interface circuit|
    JPS5931274B2|1979-06-05|1984-08-01|Iwasaki Tsushinki Kk|EP0173984A3|1984-08-31|1989-06-07|Fujitsu Limited|System for controlling the isdn activation sequence|
    JPH0433056B2|1985-07-29|1992-06-02|Hitachi Ltd|
    JPH0652896B2|1986-03-20|1994-07-06|沖電気工業株式会社|Start control method|
    US5359594A|1992-05-15|1994-10-25|International Business Machines Corporation|Power-saving full duplex nodal communications systems|
    US5740199A|1994-03-23|1998-04-14|Motorola Inc.|High speed wire-or communication system and method therefor|
    US5420865A|1994-06-08|1995-05-30|Alcatel Data Networks|Method and apparatus for alignment of frames of information|
    JP5683313B2|2011-02-16|2015-03-11|キヤノン株式会社|Information processing apparatus, activation control method, and program|
    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    SE8207518A|SE435011B|1982-12-30|1982-12-30|SET UP AND DEVICE IN A TELECOMMUNICATION SYSTEM WHEN ACTIVATING SUBSCRIBER TERMINALS|
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